

Hi! I'm Marko Ćirić. Aspiring computer architect.
Currently working at Advanced Micro Devices, Inc. (AMD) as a Graphics IP RTL Design Engineer where as a member of the Shader Processor Input (SPI) team, I work to coordinate shader execution across all pipeline stages, manage hardware resource allocation, and optimize the flow of graphics and compute workloads to maximize parallel processing efficiency, for multiple next generation high-performance Radeon and Instinct (MI series) Graphics Cards.
In the past, I've worked at Advanced Micro Devices, Inc. (AMD) as a Graphics IP RTL Design Intern where as a member of the Geometry team, I worked to implement tessellations in hardware, for multiple next generation Radeon Graphics Cards.
With additional computer hardware experiences from university courses and personal projects, I currently focus primarily on the intersection of computer hardware and computer graphics, but have an extended interest in ASICs for AI acceleration as a future career.
Born in Belgrade, Serbia in 2002 but raised in Vancouver, BC before moving to Toronto, ON for university.
I have interests in music, including record and CD collecting, home cooking, sailing, martial arts, specifically karate and judo, hiking, painting with oil pastels, and fashion.
Thinking about it now, my interests together involve some combination of passion, introspection, creativity, logic, and discipline.
So, it's perhaps not surprising that I'm pursuing a career in ASIC and RTL design where the field as a whole, also constitutes and requires, in some ways, a combination of these mindsets/skills.
Location: Toronto, ON
Education: BASc in Computer Engineering, University of Toronto
Specialty: Computer Hardware, Computer Architecture, Digital Systems Design, VLSI Technology, Analog/Digital Electronics, Embedded Systems
+---------------+ +---------------+
| Gaussian | | Touch |
| Reduction | | Interpreter |
+---------------+ +---------------+
| |
v |
+---------------+ |
| Culling |<---------------+
| Module | |
+---------------+ |
| |
v |
+---------------+ |
| Radix | |
| Sort | |
+---------------+ |
| |
v |
+---------------+ |
| 3D-2D |<---------------+
| Projection |
+---------------+
|
v
+---------------+
| Display |
| Unit |
+---------------+University capstone project focused on implementing and optimizing 3D Gaussian Splatting rendering on the Snapdragon 8 Gen 2 SoC. Developed a complete rendering pipeline including Gaussian reduction, culling, sorting, projection, and display modules to achieve 20 fps performance on mobile hardware. Also, configured the renderer to use touch input to update the camera view inside the scene. Implemented renderer using Vulkan API to maximize hardware utilization and performance.
Technologies: Computer Graphics, 3D Gaussian Splatting, Vulkan, Android SDK, Qualcomm Snapdragon, Touch Interaction
Project Details +--------------+ +---------------+ +---------------+
| Ultrasonic |--->| Object |---->| Trajectory |
| Sensors | | Localization | | Calculation |
+--------------+ +---------------+ +---------------+
| | |
| v |
| +---------------+ |
+------------>| Servo |<----------+
| Control |
+---------------+
|
v
+---------------+
| HDMI |
| Visualization |
+---------------+Designed a real-time detection and response system for tracking and intercepting space debris. Used an array of ultrasonic sensors to detect objects and calculate their trajectories with custom IP blocks in RTL. Implemented servo-controlled laser targeting and landing position prediction with HDMI visualization.
Technologies: Artix-7 FPGA, SystemVerilog, MicroBlaze, Ultrasonic Sensors, Servo Motors, HDMI
Project Details +--------------+ +---------------+ +---------------+
| STM32F4 |--->| USART |--->| DAC |
| Transmitter | | Interface | | Conversion |
+--------------+ +---------------+ +---------------+
| |
v v
+--------------+ +---------------+
| Wireless | | STM32F4 |
| Transmission |------------------------>| Receiver |
+--------------+ +---------------+
|
v
+---------------+
| ADC |
| Conversion |
+---------------+Implemented wireless communication between two STM32F4 microcontrollers, allowing for data transmission up to 20 meters. Created the interface between the STM32F4 and computer using USART serial communication, with data encoding/decoding through DAC/ADC conversion.
Technologies: STM32F4, USART, DAC/ADC, DMA, Hercules SETUP utility
+--------------+ +---------------+ +---------------+
| Chord |--->| FFT |--->| Frequency |
| Input | | Processing | | Extraction |
+--------------+ +---------------+ +---------------+
| | |
| v |
| +---------------+ |
+------------>| Melody |<----------+
| Generation |
+---------------+
|
v
+---------------+
| Audio |
| Output |
+---------------+Developed a system that generates new melodies with variations in pitches and rhythms based on input chords. The algorithm digitally processes chord inputs, computes FFT to extract dominant frequencies, and generates randomized melodies based on harmonic relationships.
Technologies: Raspberry Pi, Python, FFT Analysis, Digital Signal Processing
Project Details +--------------+ +---------------+ +---------------+
| Class-B |--->| Push-Pull |--->| Low-Pass |
| Amplifier | | Configuration | | Filter |
+--------------+ +---------------+ +---------------+
| | |
| v |
| +---------------+ |
+------------>| Transformer |<----------+
| Coupling |
+---------------+
|
v
+---------------+
| 50 Ω Load |
| (Antenna) |
+---------------+Designed a class-B discrete transistor power amplifier with a low-pass filter to drive the software-defined radio's antenna. Used transformer coupling and BJTs in a push-pull configuration with a 3rd order LC low-pass filter to pass signals in the 8-16 MHz range.
Technologies: NI Multisim, Altium Designer, Python, Oscilloscope, Multimeter
+--------------+ +---------------+ +---------------+
| Instruction |--->| Register |--->| ALU |
| Decoder | | File | | Operations |
+--------------+ +---------------+ +---------------+
| | |
| v |
| +---------------+ |
+------------>| Memory |<----------+
| Interface |
+---------------+
|
v
+---------------+
| I/O |
| Devices |
+---------------+Designed a 16-bit, 8-register processor in Verilog based on the ARM architecture family. Implemented subroutine and stack functionality, along with connections to external I/O devices. Supported various operations including arithmetic, logical, memory, and branch instructions.
Technologies: Verilog, Intel Quartus Prime Design Software, ModelSim, ARM Architecture, Hardware Simulation
+--------------+ +---------------+ +---------------+
| Radio |--->| Channel |--->| Micro |
| Controller | | Assignment | | Servos |
+--------------+ +---------------+ +---------------+
| | |
| v |
| +---------------+ |
+------------>| ESC |<----------+
| Controller |
+---------------+
|
v
+---------------+
| 3D Printed |
| Airframe |
+---------------+3D printed a radio-controlled airplane as my high school capstone project. Used four micro servos to control the airplane's direction with each servo corresponding to a channel on the radio control system. Implemented an ESC controller to regulate the motor speed.
Technologies: 3D Printing, Radio Control Systems, Servo Motors, ESC Controllers